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  4. VHDL. Lenguaje para síntesis y modelado de circuitos
VHDL. Lenguaje para síntesis y modelado de circuitos
VHDL. Lenguaje para síntesis y modelado de circuitos
Programming and Languages

VHDL. Lenguaje para síntesis y modelado de circuitos

by Fernando Pardo Carpio, José A. Boluda Grau · Ra-Ma S.A. Editorial y Publicaciones · tapa blanda · ISBN 9788478975952

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VHDL. Lenguaje para síntesis y modelado de circuitos
VHDL. Lenguaje para síntesis y modelado de circuitos
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Product details

Author: Fernando Pardo Carpio, José A. Boluda Grau
ISBN: 9788478975952
Publisher: Ra-Ma S.A. Editorial y Publicaciones
Language: Spanish
Format: tapa blanda
Release date: 11/1/2003
Pages: 272 pages
Dimensions: 2 x 16.6 x 23.8 cm
Weight: 520 g
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Synopsis of VHDL. Lenguaje para síntesis y modelado de circuitos

«VHDL. Lenguaje para síntesis y modelado de circuitos» is the manual by Fernando Pardo and José A. Boluda, published by Ra-Ma in paperback (272 pages).

The book explains the syntax of VHDL, a hardware description standard for digital design, and the working methodology based on simulation and automatic circuit synthesis. In 12 chapters and 3 appendices it covers structural, dataflow and algorithmic description styles, libraries and packages, and CAD tools.

Updated second edition, with new language elements. Includes CD-ROM with examples, VHDL simulation software and Altera synthesis tools for MS Windows.

Aimed at digital design students and engineers beginning to apply VHDL in their professional work.



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